Mentor, A Siemens Business Verification Consultant (SystemVerilog, UVM) - 8451 in United States
Verification Consultant (SystemVerilog, UVM) - 8451
Work Location XX - Remote Location - North America
Req ID 8451
Job Category Consulting
Company: Mentor Graphics
Job Title: Verification Consultant (SystemVerilog, UVM) - 8451
Job Location: US - Remote
Job Category: Consulting
•Deliver consulting services covering a broad range of functional verification activities.
• Responsible for leading and executing consulting programs and working with customers to implement and deploy advanced verification methodologies.
• Help customers leverage the full capability of Mentor tools and technologies.
• Communicate customer technical requirements to product marketing
• Travel will be involved mainly within the US, occasionally international
•BSEE or BSCS, or equivalent; MSEE preferred.
• 5+ years of experience in a design engineering role focusing on functional verification
• 5+ years of ASIC/FPGA verification experience using SystemVerilog and the UVM
• Must have experience in:
- Constrained-random verification
- Developing verification plans
- Developing functional coverage models
- Designing and implementing UVM test benches
- Developing BFMs
- Writing and debugging directed and random test cases.
• C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired.
• Previous experience with automation/scripting (Perl, sed, awk, tcl/tk, sh)
• Good communication skills
• FPGA experience is a plus
This position may require access to export-controlled technology. If an export license is required and Mentor Graphics elects to apply for such a license, then candidates must be approved and licensed by the applicable government authorities as a condition of employment.
All qualified applicants will receive consideration for employment without regard to race, sex, sexual orientation, gender expression or identity, color, religion, national origin, disability or protected veteran status.