Mentor, A Siemens Business European Application Engineer -Advanced Functional Verification 7025 in Munich, Germany

European Application Engineer -Advanced Functional Verification 7025


Company: Mentor Graphics

Job Title: European Application Engineer - 7025

Job Location: Germany - Munich

Job Category: Applications Engineering

Position Overview:

Mentor, a Siemens business, is seeking a European Application Engineer - Advanced Functional Verification to join our team.

As European Application Engineer for Functional Verification you play a critical role to the success of Mentor Graphics. You will be part of an Application Engineering team managed by the European Technical Director for Digital Design and Verification Solutions.

This specific position will focus on helping our customers to migrate into Advanced Functional Verification Methodologies (SV/UVM) coming from legacy methodologies. You are expected to leverage your expertise in Functional Verification, to assist our key customers in identifying their major verification challenges, creating strategies to overcome these challenges, and provide expert assistance in the deployment of Mentor tools and technology aimed at addressing these challenges.

The successful candidate will:

• Bring tangible and lasting improvements in performance, cost, quality, and verification time to our customer’s verification processes

• Work with customers to solve complex technical challenges in multiple disciplines of HW/SW Functional Verification including Assertion Based Verification, Coverage Driven Verification, Formal Verification, Low Power Verification, and Verification Management

• Provide technical feedback to Mentor product development teams pertaining to critical issues and recommended enhancements

Job Qualifications:

• Education: MSEE/BSEE (or equivalent) required with experience in the area of HW/SW functional verification.

• Candidate must have experience in aspect oriented verification methodology (“e/Specman”) including

  • Verification planning and management experience with block level as well, as SOC level designs
  • Working knowledge of UVM/VMM Verification Methodology
  • Working knowledge of verification languages (SystemVerilog, e/Specman, SystemC)
  • Expert level usage of at least one major verification platform

• Experience with Mentor Functional Verification products desired but not required.

• Excellent verbal and written presentation and communication skills are required

• The ability to thrive in a dynamic environment including the ability to multiplex many issues, establish and meet priorities, while maintaining a helpful/caring attitude towards fellow workers, and customers

• A desire to help customers exploit new technologies is essential for success in the position