Mentor, A Siemens Business Senior Application Engineer - 6743 in Irvine, California
Senior Application Engineer - 6743
Work Location US - CA, Irvine
Req ID 6743
Job Category Applications Engineering
Company: Mentor Graphics
Job Title: Verification Application Engineer - 6743
Job Location: US - CA - Irvine
Job Category: Applications Engineering
This is NOT an entry level position
Work with customers as a world leader in electronic software design solutions, providing services for the world's largest electronics and semiconductor companies. Continue to learn and support state of the art, Mentor Graphics’ Functional Verification tools. This position will provide technical selling support to the Americas' sales team out of the Irvine, California office. As a Functional Verification Applications Engineer, you will be part of a team of product specialists contributing to the success of account managers working to increase the deployment of Mentor Graphics’ Functional Verification products in North American accounts.
• Providing technical leadership on all aspects of the sales campaign. Contribute toward and execute on pre/post sales account strategy as member of a sales team.
• Qualify technical viability of the opportunity and communicate it to the sales team.
• Influence factory or product group to meet customer's needs and shape product direction.
• Lead technical presentations, demonstrations, evaluations, and benchmarks.
• Understand how to position MGC product/solutions to shape sales strategy.
• Effectively communicate Value Proposition of Mentor Graphics' solutions to customers.
• Maintain ongoing positive relationships with customers.
• Work collaboratively with team members to ensure mutual success.
The successful candidate will possess the following combination of education and experience:
• BS degree (or equivalent) in Electrical Engineering, Computer Science or similar field is required. MS degree is preferred.
• Must have 5+ years of experience in the EDA or Semiconductor field focusing on Functional Verification.
• A strong understanding of ASIC and FPGA design and Functional Verification flow is required.
• Strong knowledge of functional level Functional Verification methodologies is essential.
• Working knowledge in the areas of System Verilog, OVM / UVM, OVL / PSL / SVA is highly desired.
• Experience with Emulation Methodology, clock domain crossing and/or formal verification is a plus.
• Good presentation and communication skills are essential.
• Self-motivated and self-disciplined.
• US Citizenship required.
This position may require access to export-controlled technology. If an export license is required and Mentor Graphics elects to apply for such a license, then candidates must be approved and licensed by the applicable government authorities as a condition of employment.
All qualified applicants will receive consideration for employment without regard to race, sex, sexual orientation, gender expression or identity, color, religion, national origin, disability or protected veteran status.